Registers

Serial In - Parallel Out
Shift Registers

For this kind of register, data bits are entered serially in the same manner as discussed in the last section.  The difference is the way in which the data bits are taken out of the register.  Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously.  A  construction of a four-bit serial in - parallel out register is shown below.

4-bit SIPO register

In the animation below, we can see how the four-bit binary number 1001 is shifted to the Q outputs of the register.

4-bit SIPO animation